Course: ELE206-COS306
Instructor: Malik
F 2015

Description of Course Goals and Curriculum

This course is designed to be an introduction to digital logic and its uses in computing. The low-level architecture of a computer is covered from individual transistor arrangements, up to the design of a full processor. Along the way, components are discussed in increasing order of complexity, with additional layers of abstraction being used to keep it comprehensible. For example, Boolean algebra and logic gates are discussed first (such as AND and OR gates) because those are the foundations of digital logic. This allows for the construction of combinational logic circuits, which do not run with a clock. After that unit however, sequential logic is introduced, which does run with a clock. That allows for arrangements of these gates to be discussed for building datapath components, including adders or multiplexors. With datapath components, the controller and datapath can then be established as separate systems that work concurrently to make a processor. Optimization is covered at the end and discusses the space/time/power tradeoff that goes into design decisions. General engineering strategies and practices are also taught, including design by composition, which emphasizes managing complexity using layers of abstraction. As mentioned before, a processor - which is made up of thousands or more logic gates - is kept comprehensible because the logic gates are not looked individually. They are abstracted into components which are then abstracted into the controller or datapath. Also, other design tools and optimization tools are covered, including finite-state machines, high-level state machines, Karnaugh maps, and the Quine-McCluskey algorithm.

Learning From Classroom Instruction

Classroom instruction is done via lectures, however instruction overall happens through three mediums: lectures, labs, and Piazza. Lectures are taught by the professor, and are structured around the book, which is presented with PowerPoints. Each PowerPoint has a separate topic, although it may take multiple lectures to get through one PowerPoint. Lectures are also recorded and put on Blackboard, along with the slides. In addition to the main lecture, there are multiple TAs available to answer questions in lab and on Piazza. Both provide times for students to ask nagging questions and figure out how to complete lab assignments. Lab assignments, while connected to the course material, are not explained in lecture. Labs involve programming hardware using a hardware description language, and this is not taught specifically, making the TAs valuable resources for students.

Learning For and From Assignments

There are two main types of assignment in ELE 206, along with one smaller assignment type. Like many STL courses, there is a lab component with demos and write-ups, and there are also problem sets. Demos, write-ups, and psets are all due weekly. Labs cover material that is discussed in class, although it is not all done with techniques that are explicitly discussed. Labs are done using Verilog, a hardware description language, and assignments are to program certain digital circuits using it, however, Verilog is not taught. It must be learned from the TAs, the Verilog guide provided on Blackboard, or from other sources. The circuits being programmed are from class however. As far as handing in assignments, demos can be done at any open lab section during the week, as long as they are completed before Wednesday. Demos are used to show TAs that your code works. Also, the write-up can be submitted on Blackboard at any time, although it is also due by Wednesday. Not all labs are completed in one week, so the demos and write-ups may be for a check-in for that week. Problem sets are due on Mondays by the end of the day, and cover material that goes along with the book and the lectures. The third type of assignment is called a Key Ideas assignment. It is a short (50 words or less) answer to the big question from that days lecture, and it is due before the next lecture starts.

External Resources

External resources include Piazza and the course materials on Blackboard. Piazza is a platform for answering questions with an online discussion board, and is useful for having quick questions, concepts, and lab components explained. The course materials are useful both for study and for information for assignments. It includes lecture slides, screencasts of lectures, and the Verilog tutorial.

What Students Should Know About This Course For Purposes Of Course Selection

This course is a departmental for Electrical Engineers, and is normally taken sophomore year. It is also cross-listed as a Computer Science class and is required for a concentration in systems for the COS major. It requires a strong problem-solving mindset, and the ability to quickly abstract lower-level ideas into high-level ones, or vice versa, is incredibly useful for designing the systems you will be asked to design. In fact, many of the design problems can be very similar to puzzles, making puzzle-solving a useful skill as well. Logical thinking is also needed, especially when working with combinational logic and understanding what a low-level circuit does. Problems are rarely straightforward, so an ability to creatively approach them is necessary. While coming up with a solution can oftentimes be done algorithmically, it is usually helpful to have an intuition for the problems. This comes from the problem-solving, puzzle-solving mindset mentioned before, and can be developed by looking at and attempting to understand a variety of logic circuits. Attendance in lecture and careful review for the Key Ideas assignment is also very important for understanding what each part of the circuits does, which can make the intuitive leaps easier. Studying is also best done in groups, because multiple passes over the same circuit/logic/problem can bring up new insights that wouldn't have been possible alone. Psets and labs can be done with a partner as well, and it is strongly recommended to find a partner. If nothing else, having a partner is useful for tag-team crunching out many long lines of Verilog, and checking for silly mistakes that will make debugging a nightmare. Overall, take this if you're ELE or COS with a systems concentration, or take it if you're interested in the low-level architecture of a computer. Bring your best puzzle-solving and abstracting skills to the problem sets, and prepare to learn how to use Verilog for lab sessions. Overall, the course leaves you with a feeling of accomplishment knowing that you now understand how the basics of a computer work, and it teaches you engineering principles that apply very broadly outside of the field of digital logic.
Contemporary Logic Design

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